4 bit synchronous counter lab manual

9. Construction and verification of 4-bit ripple counter and Mod/Mod ripple counter. Design and implementation of 3-bit synchronous up/down counter. Implementation of SISO, SIPO, PISO and PIPO shift registers using flip-flops. Connect the 4-bit synchronous parallel counter as shown in Fig. 2. Repeat the same procedures in the ripple counter experiment. From the transition table of the counter and the excitation table of the J-K flip flop, verify that the J-K inputs to the flip flops are correct. HDL Lab Manual LIST OF EXPERIMENTS www.doorway.ru NAME OF THE EXPERIMENT PAGE NO Part A 1.a Decoder 23 1.b Encoder with and without Priority 27 1.c 8x1 MUX using case and IF statments 35 2 Realization of Full adder with basic gates 40 3 32 Bit ALU 42 4.(i) SRFF 47 (ii) JKFF 50 (iii) DFF 53 5 4 Bit synchronous BCD counter 56 6 Frequency Divider

7 -bit synchronous counter. 8 Design and verify the 4-bit asynchronous counter. 9 To design and verify operation of half adder and full adder. 10 To design and verify operation of half subtractor. To design verify the operation of magnitude comparator. 11 12 To study and verify NAND as a universal gate. LAB. HDL Lab Manual LIST OF EXPERIMENTS www.doorway.ru NAME OF THE EXPERIMENT PAGE NO Part A 1.a Decoder 23 1.b Encoder with and without Priority 27 1.c 8x1 MUX using case and IF statments 35 2 Realization of Full adder with basic gates 40 3 32 Bit ALU 42 4.(i) SRFF 47 (ii) JKFF 50 (iii) DFF 53 5 4 Bit synchronous BCD counter 56 6 Frequency Divider 9. Design and implementation of Mod-N synchronous counter using J-K flip-flops. Design and implementation of shift register to function as i) SISO, ii) SIPO, iii) PISO, iv) PIPO, v) shift left and vi) shift right operation. Design and implementation of i) Ring counter and ii) Johnson counter using 4-bit shift register.

DIGITAL ELECTRONICS LAB MANUAL. FOR. III SEMESTER B.E (E C) Circuit Diagram: 3-Bit Asynchronous Up Counter. 3-bit Asynchronous up counter. OBJECTIVE: Introduction to digital electronics lab- nomenclature of digital ICs, Fig (i) 4 Bit Synchronous binary counter circuit diagram and waveform. Types of Counters: 4-bit Synchronous Binary Counter. A counter is a sequential circuit that moves through a predefined sequence of states upon applying of.